Hardware verification languages

Results: 197



#Item
31Hardware verification languages / Electronic design automation / SystemVerilog / Emulex / Electronic engineering / Hillsboro /  Oregon / Synopsys

Emulex Enhances Design Productivity With Synopsys’ Advanced Verification Solutions “Emulex has built a strong working relationship with Synopsys over the past several years. Because of the confidence we’ve gained i

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Source URL: www.synopsys.com

Language: English - Date: 2014-11-07 14:37:40
32VHDL-AMS / Synopsys / Reliability engineering / VHDL / SystemC / SPICE / Verilog / Aerospace engineering / Modeling language / Electronic engineering / Hardware description languages / Electronic design automation

Saber Aerospace Overview Proven Robust Design Solution for Aerospace Mechatronic Systems Saber ® is the proven standard for mechatronic system design and verification. Aerospace design teams worldwide use Saber to devel

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Source URL: www.synopsys.com

Language: English - Date: 2015-01-29 15:47:57
33Hardware description languages / Embedded microprocessors / Hardware verification languages / OpenRISC / Debuggers / Verilator / Logic design / OpenCores / SystemC / Electronic engineering / Electronics / Software

Open Source Software Meets Open Source Hardware: The OpenRISC 1000 Jeremy Bennett, Embecosm Abstract This paper presents the OpenRISC 1200, an open source implementation of the OpenRISC 1000 architecture, verified using

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Source URL: www.embecosm.com

Language: English - Date: 2013-01-16 23:54:46
34Hardware verification languages / Hillsboro /  Oregon / Synopsys / High-level synthesis / SystemC / System on a chip / Logic synthesis / Ricoh / Electronic engineering / Electronic design automation / Electronic design

Success Story Synopsys and Ricoh Ricoh Optimizes New Multi-Function Printer SoC Architecture with Synopsys Platform Architect MCO

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Source URL: www.synopsys.com

Language: English - Date: 2015-05-06 20:16:14
35Verilog-AMS / SystemVerilog / Verilog-A / Verilog / Synopsys / SystemC / Functional verification / E / System on a chip / Electronic engineering / Hardware description languages / Electronic design automation

Datasheet VCS AMS Mixed-Signal Verification Solution Overview

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Source URL: www.synopsys.com

Language: English - Date: 2015-04-29 10:15:29
36C programming language / Parallel computing / Application programming interfaces / Fortran / OpenMP / Hardware verification languages / Ada / Directive / C / Computing / Software engineering / Computer programming

WG 14 N1827 WG14 CFP meeting minutes for the meeting of03/18, 12:00 EST: Attendees: Jim, Rajan, David, Mike, Marius New agenda items: Timing for people available during the WG14 C meeting and means of co

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Source URL: www.open-std.org

Language: English - Date: 2014-04-10 15:43:16
37Hardware verification languages / Hardware description languages / Logic design / SystemVerilog / Debugging / E / Logic simulation / VHDL / Timing closure / Electronic engineering / Electronic design automation / Digital electronics

Datasheet Verdi3 Automated Debug System Overview

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Source URL: www.synopsys.com

Language: English - Date: 2015-04-29 10:15:28
38SystemC / Embedded system / Field-programmable gate array / Fault-tolerant design / Integrated circuit design / Software design / Electronic system-level design and verification / Advanced Learning and Research Institute / Electronic engineering / Electronics / Hardware description languages

ECE 561: HW/SW Design of Embedded Systems IN OUT

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Source URL: www.engr.colostate.edu

Language: English - Date: 2009-01-05 17:49:10
39Hardware description languages / Logic design / Logic simulation / VHDL / Standard cell / Functional verification / SPICE / Verilog / Simulation / Electronic engineering / Electronic design automation / Digital electronics

White Paper Benefits of Using ESP in Memory Designs May 2010

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Source URL: www.synopsys.com

Language: English - Date: 2015-02-04 07:15:42
40Hardware description languages / Open Verification Methodology / SystemVerilog / Verilog / SystemC / Synopsys / Application-specific integrated circuit / E / Aldec / Electronic engineering / Electronic design automation / Hardware verification languages

RELEASED ON TUESDAY May 01, 2012 Job Title Senior Member Technical Staff Design & Verification Training

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Source URL: www.doulos.com

Language: English - Date: 2012-05-02 18:00:58
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